помогите написать программу на PIC16F876. только нужно на ассемблере, чтобы можно было посмотреть сам текст программы. микроконтроллер управляет углом открытия тиристоров в сварочном аппарате. с датчика 0,через ОУ сигнал идет на прерывание. кнопками регулируется уровень мощности(нужно 10 уровней от 10 до 100%) и индикация уровней на семисегментом индикаторе( числа от 0 до 9 соответственно). схема взята отсюда и немного упрощена( выкинут зуммер и датчик температуры) : http://elektro-shemi.ru/svarochnyj_apparat_s_faznym_upravleniem_tiristorami_na_mikrokontrollere_pic16f876.htmlДобавлено (26.05.2014, 21:12)
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Помогите расшифровать текст программы. она написана для PIC16F876. Программа написана для сварочного аппарата с фазным управлением тиристорами.
processor 16F876
#include <P16F876.INC>
__config 0x3F35
; _CP_OFF & _DEBUG_OFF & _WRT_ENABLE_ON & _CPD_OFF & _LVP_OFF & _BODEN_OFF & _PWRTE_ON
; & _WDT_ON & _XT_OSC
; RAM-Variable
LRAM_0x20 equ 0x20
LRAM_0x21 equ 0x21
LRAM_0x22 equ 0x22
LRAM_0x23 equ 0x23
LRAM_0x24 equ 0x24
LRAM_0x25 equ 0x25
LRAM_0x26 equ 0x26
LRAM_0x27 equ 0x27
LRAM_0x28 equ 0x28
LRAM_0x29 equ 0x29
LRAM_0x2A equ 0x2A
LRAM_0x2B equ 0x2B
LRAM_0x2C equ 0x2C
LRAM_0x2D equ 0x2D
LRAM_0x2E equ 0x2E
LRAM_0x2F equ 0x2F
LRAM_0x30 equ 0x30
LRAM_0x31 equ 0x31
LRAM_0x32 equ 0x32
LRAM_0x33 equ 0x33
LRAM_0x34 equ 0x34
LRAM_0x35 equ 0x35
LRAM_0x36 equ 0x36
LRAM_0x37 equ 0x37
LRAM_0x38 equ 0x38
LRAM_0x39 equ 0x39
LRAM_0x3A equ 0x3A
LRAM_0x3B equ 0x3B
LRAM_0x3C equ 0x3C
LRAM_0x3D equ 0x3D
LRAM_0x3E equ 0x3E
LRAM_0x70 equ 0x70
LRAM_0x71 equ 0x71
; Program
Org 0x0000
; Reset-Vector
GOTO LADR_0x00C1
Org 0x0004
; Interrupt-Vector
GOTO LADR_0x0005
LADR_0x0005
MOVWF LRAM_0x70
SWAPF STATUS,W
MOVWF LRAM_0x71
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BTFSC INTCON,INTF
GOTO LADR_0x0013
BSF PORTA,5 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
CLRF PIR1 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
CLRF PIR2 ; !!Bank!! PIR2 - PIE2 - EEADR - EECON2
CLRF T2CON ; !!Bank!! T2CON - PR2 - RAM - RAM
CLRF TMR2 ; !!Bank!! TMR2 - SSPCON2 - RAM - RAM
GOTO LADR_0x001D
LADR_0x0013
BCF PORTA,5 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BCF INTCON,INTF
MOVLW 0x4D
MOVWF T2CON ; !!Bank!! T2CON - PR2 - RAM - RAM
CLRF TMR2 ; !!Bank!! TMR2 - SSPCON2 - RAM - RAM
CLRF PIR1 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
CLRF PIR2 ; !!Bank!! PIR2 - PIE2 - EEADR - EECON2
DECFSZ LRAM_0x39,F
GOTO LADR_0x001D
DECF LRAM_0x3A,F
LADR_0x001D
SWAPF LRAM_0x71,W
MOVWF STATUS
SWAPF LRAM_0x70,F
SWAPF LRAM_0x70,W
RETFIE
LADR_0x0022
MOVWF LRAM_0x2C
MOVF LRAM_0x2C,W
SUBLW 0x1D
BTFSC STATUS,C
GOTO LADR_0x0029
MOVLW 0x00
MOVWF LRAM_0x2C
LADR_0x0029
CLRF PCLATH ; !!Bank Program-Page-Select
MOVF LRAM_0x2C,W
ADDWF PCL,F
RETLW 0xEE
RETLW 0x88
RETLW 0xB6
RETLW 0xBC
RETLW 0xD8
RETLW 0x7C
RETLW 0x7E
RETLW 0xA8
RETLW 0xFE
RETLW 0xFC
RETLW 0xFC
RETLW 0xDC
RETLW 0x62
RETLW 0xFA
RETLW 0x10
RETLW 0x00
RETLW 0xF0
LADR_0x003D
CLRWDT
BTFSS INTCON,T0IF
RETLW 0x00
BCF INTCON,T0IF
INCFSZ LRAM_0x3C,F
GOTO LADR_0x0044
INCF LRAM_0x3D,F
LADR_0x0044
INCF LRAM_0x2D,W
ANDLW 0x03
MOVWF LRAM_0x2D
BSF PORTC,7 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BSF PORTC,4 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BSF PORTC,5 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BSF PORTC,6 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVLW 0xC1
MOVWF PORTB ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVF LRAM_0x2D,F
BTFSS STATUS,Z
GOTO LADR_0x0086
BTFSS PORTB,7 ; !!Bank!! PORTB - TRISB - PORTB - TRISB
GOTO LADR_0x0073
BTFSS PORTB,6 ; !!Bank!! PORTB - TRISB - PORTB - TRISB
GOTO LADR_0x0073
MOVLW 0x0A
MOVWF LRAM_0x2E
MOVLW 0x32
MOVWF LRAM_0x2F
BTFSS LRAM_0x30,0
GOTO LADR_0x0068
BTFSS LRAM_0x30,2
GOTO LADR_0x0066
BCF LRAM_0x30,2
BSF LRAM_0x30,1
BCF LRAM_0x30,0
GOTO LADR_0x0068
LADR_0x0066
BSF LRAM_0x30,2
BCF LRAM_0x30,1
LADR_0x0068
BTFSS LRAM_0x30,3
GOTO LADR_0x0072
BTFSS LRAM_0x30,5
GOTO LADR_0x0070
BCF LRAM_0x30,5
BSF LRAM_0x30,4
BCF LRAM_0x30,3
GOTO LADR_0x0072
LADR_0x0070
BSF LRAM_0x30,5
BCF LRAM_0x30,4
LADR_0x0072
GOTO LADR_0x0086
LADR_0x0073
BTFSS PORTB,7 ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BSF LRAM_0x30,0
BTFSS PORTB,6 ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BSF LRAM_0x30,3
MOVF LRAM_0x2F,F
BTFSS STATUS,Z
GOTO LADR_0x007C
MOVLW 0x32
MOVWF LRAM_0x2F
LADR_0x007C
DECFSZ LRAM_0x2F,F
GOTO LADR_0x0086
DECFSZ LRAM_0x2E,F
GOTO LADR_0x0086
MOVLW 0x01
MOVWF LRAM_0x2E
BTFSS PORTB,7 ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BSF LRAM_0x30,1
BTFSS PORTB,6 ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BSF LRAM_0x30,4
LADR_0x0086
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVLW 0x01
MOVWF PORTB ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVLW 0x00
MOVWF PCLATH ; !!Bank Program-Page-Select
MOVF LRAM_0x2D,W
ADDLW 0x96
BTFSC STATUS,C
INCF PCLATH,F ; !!Bank Program-Page-Select
MOVF LRAM_0x2D,W
ADDWF PCL,F
GOTO LADR_0x009A
GOTO LADR_0x009F
GOTO LADR_0x00A4
GOTO LADR_0x00A9
LADR_0x009A
MOVF LRAM_0x28,W
CALL LADR_0x0022
MOVWF PORTB ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BCF PORTC,7 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
RETLW 0x01
LADR_0x009F
MOVF LRAM_0x29,W
CALL LADR_0x0022
MOVWF PORTB ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BCF PORTC,4 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
RETLW 0x01
LADR_0x00A4
MOVF LRAM_0x2A,W
CALL LADR_0x0022
MOVWF PORTB ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BCF PORTC,5 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
RETLW 0x01
LADR_0x00A9
MOVF LRAM_0x2B,W
CALL LADR_0x0022
MOVWF PORTB ; !!Bank!! PORTB - TRISB - PORTB - TRISB
BCF PORTC,6 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
RETLW 0x01
LADR_0x00AE
MOVLW 0x0A
MOVWF LRAM_0x31
MOVLW 0x1E
MOVWF LRAM_0x32
LADR_0x00B2
CALL LADR_0x003D
CALL LADR_0x014A
BTFSC LRAM_0x30,7
GOTO LADR_0x00B8
BCF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
GOTO LADR_0x00BC
LADR_0x00B8
BTFSS LRAM_0x3D,1
BCF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BTFSC LRAM_0x3D,1
BSF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
LADR_0x00BC
DECFSZ LRAM_0x31,F
GOTO LADR_0x00B2
DECFSZ LRAM_0x32,F
GOTO LADR_0x00B2
RETURN
LADR_0x00C1
CLRWDT
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
CLRF PIR1 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
CLRF PIR2 ; !!Bank!! PIR2 - PIE2 - EEADR - EECON2
MOVLW 0x0C
MOVWF TMR0 ; !!Bank!! TMR0 - OPTION_REG - TMR0 - OPTION_REG
MOVLW 0x05
MOVWF PORTA ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
MOVLW 0x8E
MOVWF ADCON0 ; !!Bank!! ADCON0 - ADCON1 - RAM - RAM
MOVLW 0x01
MOVWF PORTB ; !!Bank!! PORTB - TRISB - PORTB - TRISB
MOVLW 0x08
MOVWF PORTC ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
MOVLW 0xF0
MOVWF T2CON ; !!Bank!! T2CON - PR2 - RAM - RAM
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
CLRF INTCON
MOVLW 0x4D
MOVWF T2CON ; !!Bank!! T2CON - PR2 - RAM - RAM
CLRF TMR2 ; !!Bank!! TMR2 - SSPCON2 - RAM - RAM
CLRF PIR1 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
CLRF PIR2 ; !!Bank!! PIR2 - PIE2 - EEADR - EECON2
CLRF LRAM_0x30
BCF PORTC,2 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BCF PORTA,5 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BCF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
MOVLW 0x0D
MOVWF LRAM_0x28
MOVLW 0x0C
MOVWF LRAM_0x29
MOVLW 0x0B
MOVWF LRAM_0x2A
MOVLW 0x0A
MOVWF LRAM_0x2B
CALL LADR_0x00AE
BSF PORTC,2 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
MOVLW 0x0D
MOVWF LRAM_0x28
MOVLW 0x0C
MOVWF LRAM_0x29
MOVLW 0x0B
MOVWF LRAM_0x2A
MOVLW 0x0A
MOVWF LRAM_0x2B
CALL LADR_0x00AE
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BSF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BSF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BSF STATUS,IRP
CLRF PIR2 ; !!Bank!! PIR2 - PIE2 - EEADR - EECON2
MOVLW 0x40
MOVWF TMR1H ; !!Bank!! TMR1H - Unimplemented - EEADRH - Unimplemented
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BSF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BSF STATUS,IRP
BCF PIR1,7 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
BSF PIR1,0 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BSF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BSF STATUS,IRP
MOVF PIR1,W ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVWF LRAM_0x3E
MOVF LRAM_0x3E,W
SUBLW 0x64
BTFSC STATUS,C
GOTO LADR_0x0114
MOVLW 0x0A
MOVWF LRAM_0x3E
CALL LADR_0x016E
LADR_0x0114
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVLW 0x0C
MOVWF TMR0 ; !!Bank!! TMR0 - OPTION_REG - TMR0 - OPTION_REG
MOVLW 0x15
MOVWF PORTA ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
MOVLW 0x8E
MOVWF ADCON0 ; !!Bank!! ADCON0 - ADCON1 - RAM - RAM
MOVLW 0x01
MOVWF PORTB ; !!Bank!! PORTB - TRISB - PORTB - TRISB
MOVLW 0x08
MOVWF PORTC ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
MOVLW 0xD0
IORWF INTCON,F
MOVLW 0x02
MOVWF PIR1 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
CLRF PIR2 ; !!Bank!! PIR2 - PIE2 - EEADR - EECON2
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BSF PORTC,2 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
MOVF LRAM_0x3E,W
SUBLW 0xC8
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVWF T2CON ; !!Bank!! T2CON - PR2 - RAM - RAM
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVF LRAM_0x3E,W
MOVWF LRAM_0x22
CLRF LRAM_0x23
CALL LADR_0x01AC
MOVLW 0x0F
MOVWF LRAM_0x28
MOVF LRAM_0x24,W
MOVWF LRAM_0x29
MOVF LRAM_0x25,W
MOVWF LRAM_0x2A
MOVF LRAM_0x26,W
MOVWF LRAM_0x2B
MOVF LRAM_0x2B,F
BTFSC STATUS,Z
MOVLW 0x0F
MOVWF LRAM_0x2B
MOVF LRAM_0x39,W
BTFSS STATUS,Z
GOTO LADR_0x0114
BTFSS LRAM_0x3A,0
GOTO LADR_0x01DA
GOTO LADR_0x01E6
GOTO LADR_0x0114
LADR_0x014A
BTFSS LRAM_0x30,1
GOTO LADR_0x014F
BTFSS LRAM_0x30,4
GOTO LADR_0x014F
GOTO LADR_0x016E
LADR_0x014F
BTFSC LRAM_0x30,1
CALL LADR_0x0154
BTFSC LRAM_0x30,4
CALL LADR_0x0161
RETURN
LADR_0x0154
BCF LRAM_0x30,1
BCF LRAM_0x30,4
MOVF LRAM_0x3E,W
SUBLW 0x64
BTFSC STATUS,Z
RETURN
BTFSC STATUS,C
GOTO LADR_0x015F
MOVLW 0x64
MOVWF LRAM_0x3E
RETURN
LADR_0x015F
INCF LRAM_0x3E,F
RETURN
LADR_0x0161
BCF LRAM_0x30,1
BCF LRAM_0x30,4
MOVLW 0x0A
SUBWF LRAM_0x3E,W
BTFSC STATUS,Z
RETURN
BTFSC STATUS,C
GOTO LADR_0x016C
MOVLW 0x0A
MOVWF LRAM_0x3E
RETURN
LADR_0x016C
DECF LRAM_0x3E,F
RETURN
LADR_0x016E
BCF LRAM_0x30,1
BCF LRAM_0x30,4
CLRF INTCON
BCF PORTA,5 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BSF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BSF STATUS,IRP
CLRF PIR2 ; !!Bank!! PIR2 - PIE2 - EEADR - EECON2
MOVLW 0x40
MOVWF TMR1H ; !!Bank!! TMR1H - Unimplemented - EEADRH - Unimplemented
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BSF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BSF STATUS,IRP
LADR_0x017B
BTFSC PIR1,1 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
GOTO LADR_0x017B
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVF LRAM_0x3E,W
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BSF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BSF STATUS,IRP
MOVWF PIR1 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BSF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BSF STATUS,IRP
BCF PIR1,7 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
BSF PIR1,2 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
MOVLW 0x55
MOVWF PIR2 ; !!Bank!! PIR2 - PIE2 - EEADR - EECON2
MOVLW 0xAA
MOVWF PIR2 ; !!Bank!! PIR2 - PIE2 - EEADR - EECON2
BSF PIR1,1 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
BCF PIR1,2 ; !!Bank!! PIR1 - PIE1 - EEDATA - EECON1
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
MOVLW 0x0F
MOVWF LRAM_0x28
MOVLW 0x0D
MOVWF LRAM_0x29
MOVLW 0x0C
MOVWF LRAM_0x2A
MOVLW 0x0D
MOVWF LRAM_0x2B
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BCF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BCF LRAM_0x30,7
CALL LADR_0x0287
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BSF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
RETURN
LADR_0x01AC
BCF STATUS,C
MOVLW 0x10
MOVWF LRAM_0x21
CLRF LRAM_0x24
CLRF LRAM_0x25
CLRF LRAM_0x26
CLRF LRAM_0x27
LADR_0x01B3
RLF LRAM_0x22,F
RLF LRAM_0x23,F
RLF LRAM_0x24,F
RLF LRAM_0x25,F
DECFSZ LRAM_0x21,F
GOTO LADR_0x01C6
SWAPF LRAM_0x25,W
ANDLW 0x0F
MOVWF LRAM_0x27
MOVF LRAM_0x25,W
ANDLW 0x0F
MOVWF LRAM_0x26
SWAPF LRAM_0x24,W
ANDLW 0x0F
MOVWF LRAM_0x25
MOVF LRAM_0x24,W
ANDLW 0x0F
MOVWF LRAM_0x24
RETURN
LADR_0x01C6
MOVLW 0x24
MOVWF FSR
CALL LADR_0x01CD
MOVLW 0x25
MOVWF FSR
CALL LADR_0x01CD
GOTO LADR_0x01B3
LADR_0x01CD
CALL LADR_0x003D
CALL LADR_0x014A
MOVLW 0x03
ADDWF INDF,W
MOVWF LRAM_0x20
BTFSC LRAM_0x20,3
MOVWF INDF
MOVLW 0x30
ADDWF INDF,W
MOVWF LRAM_0x20
BTFSC LRAM_0x20,7
MOVWF INDF
RETLW 0x00
LADR_0x01DA
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
CLRWDT
CALL LADR_0x0242
MOVLW 0xCC
MOVWF LRAM_0x35
CALL LADR_0x0252
MOVLW 0x44
MOVWF LRAM_0x35
CALL LADR_0x0252
GOTO LADR_0x0114
LADR_0x01E6
CALL LADR_0x0242
MOVLW 0xCC
MOVWF LRAM_0x35
CALL LADR_0x0252
MOVLW 0xBE
MOVWF LRAM_0x35
CALL LADR_0x0252
CALL LADR_0x025B
MOVWF LRAM_0x36
CALL LADR_0x025B
MOVWF LRAM_0x37
BCF STATUS,C
RRF LRAM_0x36,F
BTFSC LRAM_0x37,0
GOTO LADR_0x0114
MOVF LRAM_0x36,W
SUBLW 0x64
BTFSS STATUS,C
GOTO LADR_0x01FC
MOVLW 0x05
MOVWF LRAM_0x3B
GOTO LADR_0x0114
LADR_0x01FC
DECFSZ LRAM_0x3B,F
GOTO LADR_0x0114
LADR_0x01FE
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
CLRF INTCON
BCF PORTA,5 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BSF LRAM_0x30,7
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BCF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
CLRWDT
CALL LADR_0x0242
MOVLW 0xCC
MOVWF LRAM_0x35
CALL LADR_0x0252
MOVLW 0x44
MOVWF LRAM_0x35
CALL LADR_0x0252
MOVF LRAM_0x36,W
MOVWF LRAM_0x22
CLRF LRAM_0x23
CALL LADR_0x01AC
MOVLW 0x10
MOVWF LRAM_0x28
MOVF LRAM_0x24,W
MOVWF LRAM_0x29
MOVF LRAM_0x25,W
MOVWF LRAM_0x2A
MOVF LRAM_0x26,W
MOVWF LRAM_0x2B
MOVF LRAM_0x2B,F
BTFSC STATUS,Z
MOVLW 0x0F
MOVWF LRAM_0x2B
CALL LADR_0x00AE
CALL LADR_0x00AE
CALL LADR_0x00AE
CALL LADR_0x00AE
CALL LADR_0x00AE
CALL LADR_0x00AE
CALL LADR_0x0242
MOVLW 0xCC
MOVWF LRAM_0x35
CALL LADR_0x0252
MOVLW 0xBE
MOVWF LRAM_0x35
CALL LADR_0x0252
CALL LADR_0x025B
MOVWF LRAM_0x36
CALL LADR_0x025B
MOVWF LRAM_0x37
BCF STATUS,C
RRF LRAM_0x36,F
BTFSC LRAM_0x37,0
GOTO LADR_0x00C1
MOVLW 0x32
SUBWF LRAM_0x36,W
BTFSS STATUS,C
GOTO LADR_0x023F
MOVLW 0x05
MOVWF LRAM_0x3B
GOTO LADR_0x01FE
LADR_0x023F
DECFSZ LRAM_0x3B,F
GOTO LADR_0x01FE
GOTO LADR_0x00C1
LADR_0x0242
CALL LADR_0x0276
CALL LADR_0x027E
MOVLW 0x3C
CALL LADR_0x024A
CALL LADR_0x0276
MOVLW 0x3C
CALL LADR_0x024A
RETURN
LADR_0x024A
MOVWF LRAM_0x21
LADR_0x024B
CLRWDT
GOTO LADR_0x024D
LADR_0x024D
GOTO LADR_0x024E
LADR_0x024E
GOTO LADR_0x024F
LADR_0x024F
DECFSZ LRAM_0x21,F
GOTO LADR_0x024B
RETURN
LADR_0x0252
MOVLW 0x08
MOVWF LRAM_0x38
LADR_0x0254
RRF LRAM_0x35,F
BTFSS STATUS,C
GOTO LADR_0x026C
GOTO LADR_0x0271
LADR_0x0258
DECFSZ LRAM_0x38,F
GOTO LADR_0x0254
RETURN
LADR_0x025B
MOVLW 0x08
MOVWF LRAM_0x38
CLRF LRAM_0x35
LADR_0x025E
CALL LADR_0x027E
CALL LADR_0x0276
NOP
BTFSS PORTC,3 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BCF STATUS,C
BTFSC PORTC,3 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BSF STATUS,C
RRF LRAM_0x35,F
MOVLW 0x04
CALL LADR_0x024A
DECFSZ LRAM_0x38,F
GOTO LADR_0x025E
MOVF LRAM_0x35,W
RETURN
LADR_0x026C
CALL LADR_0x027E
MOVLW 0x06
CALL LADR_0x024A
CALL LADR_0x0276
GOTO LADR_0x0258
LADR_0x0271
CALL LADR_0x027E
CALL LADR_0x0276
MOVLW 0x06
CALL LADR_0x024A
GOTO LADR_0x0258
LADR_0x0276
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BSF PORTC,3 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
RETURN
LADR_0x027E
BCF PORTC,3 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BSF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
BCF PORTC,3 ; !!Bank!! PORTC - TRISC - Unimplemented - Unimplemented
BCF STATUS,RP0 ; !!Bank Register-Bank(0/1)-Select
BCF STATUS,RP1 ; !!Bank Register-Bank(2/3)-Select
BCF STATUS,IRP
RETURN
LADR_0x0287
MOVLW 0x32
MOVWF LRAM_0x33
MOVLW 0x32
MOVWF LRAM_0x34
LADR_0x028B
CALL LADR_0x003D
BTFSC LRAM_0x30,7
GOTO LADR_0x0290
BCF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
GOTO LADR_0x0294
LADR_0x0290
BTFSS LRAM_0x3D,1
BCF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
BTFSC LRAM_0x3D,1
BSF PORTA,4 ; !!Bank!! PORTA - TRISA - Unimplemented - Unimplemented
LADR_0x0294
DECFSZ LRAM_0x33,F
GOTO LADR_0x028B
DECFSZ LRAM_0x34,F
GOTO LADR_0x028B
BCF LRAM_0x30,1
BCF LRAM_0x30,4
RETURN
End
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